1. Field of the Invention
The present invention relates to a semiconductor film having a polycrystal structure in which crystals mass with diverse orientations as in a polycrystalline semiconductor film. The invention also relates to a semiconductor device whose active region is formed of this semiconductor film and to a method of manufacturing the semiconductor device. In particular, the present invention is suitable for a method of manufacturing a thin film transistor formed a channel formation region in this semiconductor film. The term semiconductor device herein refers to a semiconductor device in general which utilizes semiconductor characteristics to function, and semiconductor integrated circuits, electro-optical devices, and electronic equipment mounted with the semiconductor integrated circuits or the electro-optical devices fall within this category.
2. Description of the Related Art
A technique has been developed for manufacturing a thin film transistor (hereinafter referred to as TFT) from a semiconductor film that has a polycrystal structure (the film is hereinafter referred to as crystalline semiconductor film) and is formed on a glass, quartz or other substrate. A TFT formed from a crystalline semiconductor film is applied to flat panel displays, typically, liquid crystal display devices, as measures for realizing high definition image display, and is applied to monolithic displays in which a pixel portion and an integrated circuit necessary to drive the pixel portion are formed on the same substrate, as measures for realizing it.
A known alternative to SOI (silicon on insulator technology) in forming a crystalline semiconductor film is to use vapor growth method (CVD) in which a crystalline semiconductor film is formed by direct deposition on a substrate, or to crystallize an amorphous semiconductor film by heat treatment or laser light irradiation. If the formed crystalline semiconductor film is to be applied to a TFT, the latter method is employed more often because the method provides the TFT with excellent electric characteristics.
A crystalline semiconductor film can have a polycrystal structure if it is obtained by subjecting an amorphous semiconductor film formed on a glass, quartz or other substrate to heat treatment or laser light irradiation for crystallization. Crystallization is known to progress from a crystal nuclear spontaneously generated in the interface between the amorphous semiconductor film and the substrate. While crystal grains in a polycrystal structure each educe an arbitrary crystal plane, it has been found that the proportion, which the crystallization of the {111} plane requiring the minimum interface energy is educed, is high if silicon oxide is placed under the crystalline semiconductor film.
The thickness of a semiconductor film required for TFT is about 10 to 100 nm. However, it is difficult in this thickness range to control crystal orientation in the interface between the semiconductor film and a substrate that is formed from a different material due to lattice discordance or crystal nuclei generated irregularly. Also, it has been impossible to increase the grain size of each crystal grain because of mutual interference between crystal grains.
Another method of forming a crystalline silicon film has been disclosed in which an element for promoting crystallization of silicon is introduced into an amorphous silicon film, thereby obtaining a crystalline silicon film through heat treatment at a temperature lower than in prior art. For example, Japanese Patent Application Laid-open Nos. Hei 7-130652 and Hei 8-78329 describe obtaining a crystalline silicon film by introducing nickel or other metal element into an amorphous silicon film and subjecting the film to heat treatment at 550° C. for four hours.
In this case, the element introduced at a temperature lower than the temperature at which a natural nuclear is generated forms silicide, and crystal growth starts from this silicide. For instance, when the element is nickel, nickel silicide (NiSix (0.4≦x≦2.5) is formed. While nickel silicide has no specific orientation, it advances crystal growth in an amorphous silicon film almost only in the direction parallel to the substrate if the thickness of the film is 10 to 100 nm. In this case, the interface energy of the interface between NiSix and the {111} plane of the crystalline silicon is the smallest, and hence the plane parallel to the surface of the crystalline silicon film is the {110} plane to orient crystals mainly in the {110} plane orientation. However, when the crystal growth direction is parallel to the substrate surface and a crystal grows into a pillar, the crystal may not always be oriented in the {110} plane orientation because there is a degree of freedom in the rotation direction as axis of the pillar-like crystal. Accordingly, other lattice planes are deposited.
When the orientation ratio is low, continuity of lattices cannot be maintained in a crystal grain boundary where crystals of different orientations meet one another, resulting in formation of many dangling bonds. The dangling bonds formed in the crystal grain boundary acts as recombination center or trap center, to thereby lower the carrier (electrons or holes) transportation characteristic. As a result, carriers are lost in recombination or trapped by defects. If a crystalline semiconductor film as such is used to form a TFT, the TFT cannot have high electric field effect mobility.
Also, controlling positions of crystal grains as desired is nearly impossible and crystal grain boundaries are placed irregularly, which does not allow a TFT to form its channel formation region solely from crystal grains of a specific crystal orientation. This lowers the continuity of crystal lattices and forms defects in crystal grain boundaries, thereby causing fluctuations in TFT characteristics and presenting various adverse influences. For instance, the field effect mobility is degraded to make the TFT incapable of operating at high speed. In addition, a fluctuation in threshold voltage is an obstruction to low voltage driving, leading to an increase in power consumption.